Dynamic bandwidth adjustment of an RF all-digital PLL

Recent advances in digitization of RF frequency synthesizers for wireless radios have resulted in all-digital PLL (ADPLL) architectures that enjoy high precision and repeatability of their characteristics, as well as high re-configurability and re-programmability features of digital logic. So far, only semi-static operation manner of these features have been exploited. While, for example, the transfer function of the ADPLL can be precisely established, that setting is intended to be essentially constant throughout the mission-mode operation. In this paper, we propose a dynamic manner of the ADPLL transfer function adjustment, which could be used, for example, to increase the loop bandwidth due to high instantaneous excursion of a modulating data. Experiments confirm its potential and feasibility.