The data and read/write controller for March-based SRAM diagnostic algorithm MBIST

Author

Masnita, M.I. ; Wan Zuha, W.H. ; Sidek, R.M. ; Halin, I.A.

Author_Institution

Dept. of Electron. Eng., Univ. Putra Malaysia, Serdang, Malaysia

fYear

2009

fDate

16-18 Nov. 2009

Firstpage

296

Lastpage

299

Abstract

This paper presents the implementation of March-based algorithm as proposed in into an Memory Built-in Self-Test (MBIST) data and read/write controller. The design uses the approach of Finite StaÂ¿te Machine (FSM)-based architecture which is more plausible since the design was part of the engine that will be exclusively developed for the testing of this algorithm alone. This controller will represent a portion of MBIST engine that can be incorporated together with other portions to build a complete MBIST engine.

Keywords

SRAM chips; built-in self test; finite state machines; finite staÂ¿te machine; march-based SRAM diagnostic algorithm; memory built-in self test; read-write controller; Algorithm design and analysis; Automata; Automatic testing; Clocks; Data engineering; Decision support systems; Design engineering; Electronic equipment testing; Random access memory; Test pattern generators; finite state machine (FSM); functional fault models (FFMs); march algorithm; memory built in seif test (MBIST); stuck-at faults (SAF);

fLanguage

English

Publisher

ieee

Conference_Titel

Research and Development (SCOReD), 2009 IEEE Student Conference on

Conference_Location

UPM Serdang

Print_ISBN

978-1-4244-5186-9

Electronic_ISBN

978-1-4244-5187-6

Type

conf

DOI

10.1109/SCORED.2009.5443018

Filename

5443018