A 3 V, 1.6 GHz differential CMOS bandpass amplifier chain for a GPS receiver

Author

Hernandez, E. ; Berenguer, R. ; Melendez, J. ; Rodriguez, N. ; Bistue, G. ; Hernandez, J.

Author_Institution

Escuela Superior de Ingegnerios Ind., Navarra Univ., Spain

fYear

2000

fDate

28-28 April 2000

Firstpage

33

Lastpage

37

Abstract

A new CMOS bandpass amplifier chain that performs both functions of amplifier chain and bandpass filter (BPF) has been designed and implemented for a GPS direct digitisation receiver. The circuit has been implemented in a standard 0.6 /spl mu/m CMOS process, with two polysilicon layers, one high resistance polysilicon layer and three metal layers. Post layout simulations give a forward gain (S/sub 21/) of 122.2 dB, a noise figure of 2.6 dB and a quality factor of 26. The consumption of the whole circuit is of 72 mA from a single 3 V power supply.

Keywords

CMOS analogue integrated circuits; Global Positioning System; Q-factor; UHF integrated circuits; band-pass filters; circuit CAD; circuit simulation; differential amplifiers; integrated circuit design; radio receivers; 0.6 micron; 1.6 GHz; 122.2 dB; 2.6 dB; 3 V; 72 mA; CMOS process; GPS receiver; Si; bandpass filter; differential CMOS bandpass amplifier chain; direct digitisation receiver; forward gain; polysilicon layers; post layout simulations; quality factor; Band pass filters; CMOS process; CMOS technology; Circuits; Costs; Differential amplifiers; Digital signal processing chips; Frequency; Global Positioning System; Q factor;

fLanguage

English

Publisher

ieee

Conference_Titel

Silicon Monolithic Integrated Circuits in RF Systems, 2000. Digest of Papers. 2000 Topical Meeting on

Conference_Location

Garmisch, Germany

Print_ISBN

0-7803-6255-1

Type

conf

DOI

10.1109/SMIC.2000.844292

Filename

844292