DocumentCode
2027493
Title
Performance evaluation of Data Mining algorithms on three generations of Intel® microarchitecture
Author
Sadasivam, Satish Kumar ; Selvi, S. Thamarai
Author_Institution
IBM Syst. & Technol. Lab., Bangalore, India
fYear
2015
fDate
20-24 July 2015
Firstpage
334
Lastpage
341
Abstract
Data Mining algorithms and machine learning techniques form a key part of the majority of computing applications today. They are becoming an inherent part of business decision processes, e-commerce, social networking and social media applications as well as commercial and scientific computing applications. It is becoming increasingly important to provide a high performance computing platform for these emerging data mining applications. In this paper we explore the performance characteristics of the data mining benchmark suite MineBench across three “tock” generations of Intel microarchitecture. Our objective is to study the impact of microarchitecture improvements on the performance of data mining algorithms. We present comparative microarchitecture characteristics between data mining algorithms and SPEC INT 2006 benchmarks. We have proposed a generic cycle accounting methodology to attribute performance improvements to various units of the microprocessor. The proposed methodology helps differentiate the impact on performance due to front-end and back-end microarchitecture improvements.
Keywords
computer architecture; data mining; learning (artificial intelligence); performance evaluation; Intel microarchitecture; MineBench; SPEC INT 2006 benchmarks; back-end microarchitecture improvements; business decision processes; commercial computing applications; computing applications; data mining algorithms; data mining benchmark suite; e-commerce; front-end microarchitecture improvements; machine learning techniques; microarchitecture characteristics; performance evaluation; scientific computing applications; social media applications; social networking; tock generations; Algorithm design and analysis; Benchmark testing; Computer architecture; Data mining; Microarchitecture; Microprocessors; Performance evaluation; Microarchitecture; computer architecture; cycle accounting; data mining; performance evaluation;
fLanguage
English
Publisher
ieee
Conference_Titel
High Performance Computing & Simulation (HPCS), 2015 International Conference on
Conference_Location
Amsterdam
Print_ISBN
978-1-4673-7812-3
Type
conf
DOI
10.1109/HPCSim.2015.7237059
Filename
7237059
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