DocumentCode
2028415
Title
Performance improvement of multiprocessor simulation by optimizing synchronization and communication
Author
Chung, Moo-Kyoung ; Shim, Heejun ; Kyung, Chong-Min
Author_Institution
Dept. of Electr. Eng. & Comput. Sci., Korea Adv. Inst. of Sci. & Technol., Seoul, South Korea
fYear
2005
fDate
8-10 June 2005
Firstpage
158
Lastpage
164
Abstract
This paper presents fast co-simulation techniques aimed at multiprocessor-based system-on-chip (SoC) design. Unlike existing co-simulation tools that use a centralized server, which manages clocks for all processor models and inter-processor communication, the proposed techniques separate the synchronization and communication and distribute the large portion of the tasks to each processor model. The amount of synchronization is reduced, and the message passing among the processor models through time-consuming inter-process communication (IPC) is removed. Fast processor model through automatically annotated native code execution is also introduced. We implemented these solutions in STIMUL, a co-simulation framework for multiprocessor system and achieved faster simulation speed by at least a factor of 10 over existing simulators.
Keywords
logic design; message passing; multiprocessing systems; multiprocessor interconnection networks; synchronisation; system-on-chip; STIMUL co-simulation framework; message passing; multiprocessor simulation; multiprocessor-based system-on-chip design; synchronization; Clocks; Computational modeling; Conferences; Design optimization; Embedded computing; Embedded system; Message passing; Multiprocessing systems; Synchronization; Time to market;
fLanguage
English
Publisher
ieee
Conference_Titel
Rapid System Prototyping, 2005. (RSP 2005). The 16th IEEE International Workshop on
ISSN
1074-6005
Print_ISBN
0-7695-2361-7
Type
conf
DOI
10.1109/RSP.2005.38
Filename
1509447
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