• DocumentCode
    2030889
  • Title

    Poly-Silicon gate pre-doping implantation impact on MOSFET matching performances

  • Author

    Joly, Y. ; Delalleau, J. ; Lopez, L. ; Portal, J.-M. ; Aziza, H. ; Bert, Y. ; Julien, F. ; Fornara, P.

  • Author_Institution
    STMicroelectronics, Rousset, France
  • fYear
    2011
  • fDate
    6-8 April 2011
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    This paper demonstrates how poly-Silicon gate pre-doping implantation impacts MOS matching performances. Measurements are performed on test structures (MOS pairs / capacitors) and analog circuits, using five different processes with pre-doping implantation energy variation (from 35 to 10 KeV) and tilt variation (7° and 25°). TCAD simulations validate a channel counter-doping due to high pre-doping implantation energy causing mismatch degradation.
  • Keywords
    MOS capacitors; MOSFET; analogue circuits; semiconductor doping; technology CAD (electronics); MOS pairs/capacitors; MOSFET matching; TCAD simulations; analog circuits; channel counter-doping; poly-silicon gate pre-doping implantation impact; test structures; Analog circuits; Doping; Fluctuations; Logic gates; MOSFETs; Semiconductor process modeling; Voltage measurement; TCAD simulation; analog circuit; matching; pre-doping implantation energy;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design & Technology of Integrated Systems in Nanoscale Era (DTIS), 2011 6th International Conference on
  • Conference_Location
    Athens
  • Print_ISBN
    978-1-61284-899-0
  • Type

    conf

  • DOI
    10.1109/DTIS.2011.5941437
  • Filename
    5941437
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2030889