DocumentCode
2040034
Title
Experimental characterization of dummies impact on interconnects propagation performance. Optimization of dummy sizes for the CMOS 22 nm technology node
Author
Blampey, B. ; Gallitre, M. ; Farcy, A. ; Poncharra, J. ; Bermond, C. ; Flechet, B.
Author_Institution
UMR CNRS 5130, Univ. de Savoie, Le Bourget du Lac
fYear
2008
fDate
12-15 May 2008
Firstpage
1
Lastpage
4
Abstract
Based on experimental characterization, the impact of dummies on interconnects propagation performance is investigated. The study is focused on the impact of sizes and placements of these dummies. First a method to quantify impact of dummies on delay is detailed. Next we show that dummy sizes can be optimized to minimize their impacts on interconnects performance of the 22 nm node.
Keywords
CMOS integrated circuits; integrated circuit interconnections; CMOS technology node; dummies impact; interconnects propagation; Attenuation; CMOS technology; Copper; Delay; Dielectric constant; Dielectric materials; Etching; Inductance; Magnetic fields; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Signal Propagation on Interconnects, 2008. SPI 2008. 12th IEEE Workshop on
Conference_Location
Avignon
Print_ISBN
978-1-4244-2317-0
Electronic_ISBN
978-1-4244-2318-7
Type
conf
DOI
10.1109/SPI.2008.4558373
Filename
4558373
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