DocumentCode
2043555
Title
Multi-profile instruction based compression
Author
Netto, Eduardo Wanderley ; Azevedo, Rodolfo ; Centoducatte, Paulo ; Araujo, Guido
Author_Institution
IC-UNICAMP, Brazil
fYear
2004
fDate
27-29 Oct. 2004
Firstpage
23
Lastpage
29
Abstract
Code compression has been used to minimize the memory area requirement of embedded systems. Recently, performance improvement and energy consumption reduction are observed as a by-product of compression. In this paper we propose a novel technique for efficiently exploring the trade-offs involved in code compression. Our multiprofile approach to build dictionaries combines the best features of both static and dynamic program behaviors. The experiments with Mediabench and MiBench suites and the Leon (SPARCv8) processor reveal a compression ratio as low as 71% while performance speed-up reaches 1.5.
Keywords
cache storage; embedded systems; instruction sets; reduced instruction set computing; RISC architecture; cache storage; embedded system; multiprofile instruction set; program code compression; Dictionaries; Embedded computing; Embedded system; Energy consumption; Engines; Hardware; Informatics; Laboratories; Reduced instruction set computing; System-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Architecture and High Performance Computing, 2004. SBAC-PAD 2004. 16th Symposium on
ISSN
1550-6533
Print_ISBN
0-7695-2240-8
Type
conf
DOI
10.1109/SBAC-PAD.2004.26
Filename
1364733
Link To Document