Removal of Intersection for Multi-net Multi-pin Routing Problem with Layer Assignment

In this article, we consider the routing problem of VLSI physical design. Interconnects are very important in VLSI design as it impose constraints such as delay, congestion power dissipation and others with consumption of resources. Minimization of intersection between edges of different nets leads to minimization of metal plates. So, if we can remove all the intersections we can get better design and performance while cost is minimized. There are some operators earlier through which we can reduce the intersection. Flexibility and sliding property of Steiner tree is available. If we can remove all the intersections we can get better routing. Intersections may be removed by assigning additional layers. In this work we have shown that we can remove all the intersections i.e. edge crossings, moving minimum number of edges to minimum number of layers. Experimental results are quite encouraging.