DocumentCode
2048573
Title
Race-condition-aware clock skew scheduling
Author
Huang, Shih-Hsu ; Nieh, Yow-Tyng ; Lu, Feng-Pin
Author_Institution
Dept. of Electron. Eng., Chung Yuan Christian Univ., Chung Li, Taiwan
fYear
2005
fDate
13-17 June 2005
Firstpage
475
Lastpage
478
Abstract
The race conditions often limit the smallest feasible clock period that the optimal clock skew scheduling could achieve. Therefore, the combination of clock skew scheduling and delay insertion (for resolving the race conditions) might lead to further clock period reduction. However, the interactions between clock skew scheduling and delay insertion have not been well studied. In this paper, the authors provided a fresh viewpoint to look at this problem. A novel approach, called race-condition-aware (RCA) clock skew scheduling, is proposed to determine the clock skew schedule by taking the race conditions into account. The objective is not only to optimize the clock period, but also to heuristically minimize the required inserted delay. Compared with previous work, this approach has significant improvement in the time complexity.
Keywords
circuit optimisation; hazards and race conditions; logic design; scheduling; sequential circuits; timing; clock period reduction; delay insertion; race-condition-aware clock skew scheduling; sequential circuits; timing optimization; Circuits; Clocks; Delay effects; Design optimization; Hazards; Logic design; Permission; Registers; Scheduling algorithm; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2005. Proceedings. 42nd
Print_ISBN
1-59593-058-2
Type
conf
DOI
10.1109/DAC.2005.193856
Filename
1510376
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