DocumentCode
2049589
Title
Electrical design technology for low dielectric constant multilayer ceramic substrate
Author
Sasaki, Akihiro ; Shimada, Yuzo
Author_Institution
NEC Corp., Kanagawa, Japan
fYear
1991
fDate
11-16 May 1991
Firstpage
719
Lastpage
726
Abstract
The characteristics of a novel packaging substrate are described. Low propagation delay time (3.9 ns/m) can be realized by using a hollow stripline structure ceramic substrate with a 4.4 material dielectric constant. An electric design which can control characteristic impedance and crosstalk coupling noise is realized for the hollow stripline structure. An electric design which can control propagation delay time is realized. Ground plane design which can stabilize the characteristic impedance is realized. As a result, this structure substrate with low dielectric constant shows potential for application on high-speed VLSI packages in the future
Keywords
VLSI; ceramics; crosstalk; packaging; permittivity; characteristic impedance; crosstalk coupling noise; dielectric constant multilayer ceramic substrate; ground plane design; high-speed VLSI packages; hollow stripline structure; packaging substrate; propagation delay time; Ceramics; Crosstalk; Dielectric constant; Dielectric materials; Dielectric substrates; Impedance; Nonhomogeneous media; Packaging; Propagation delay; Stripline;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Components and Technology Conference, 1991. Proceedings., 41st
Conference_Location
Atlanta, GA
Print_ISBN
0-7803-0012-2
Type
conf
DOI
10.1109/ECTC.1991.163959
Filename
163959
Link To Document