DocumentCode
2052431
Title
Research outputs cascades of CMOS gate array with silicon-on-insulator structure
Author
Kogut, I.T. ; Dovhij, V.V.
Author_Institution
Vasyl Stefanyk Precarpation Nat. Univ., Ivano-Frankivsk, Ukraine
fYear
2010
fDate
23-27 Feb. 2010
Firstpage
359
Lastpage
359
Abstract
In this paper research output cascades for integrated circuits and microsystems-on-chip with silicon-on-insulator structures (SOI) of executed after traditional CMOS process and with the use of double control by connecting to the subchannels areas in SOI MOS transistors.
Keywords
CMOS logic circuits; logic arrays; silicon-on-insulator; CMOS process; SOI MOS transistors; integrated circuits; microsystems-on-chip; output cascades; silicon-on-insulator structures; CMOS integrated circuits; CMOS process; CMOS technology; Delay; Energy consumption; Integrated circuit technology; Inverters; Joining processes; MOSFETs; Silicon on insulator technology; SOI CMOS inverter; gate array; output cascade; silicon-on-insulator structure;
fLanguage
English
Publisher
ieee
Conference_Titel
Modern Problems of Radio Engineering, Telecommunications and Computer Science (TCSET), 2010 International Conference on
Conference_Location
Lviv-Slavske
Print_ISBN
978-966-553-875-2
Electronic_ISBN
978-966-553-901-8
Type
conf
Filename
5445978
Link To Document