Design of an Internet core router using the SoCBUS network on chip

The bandwidth explosion on the Internet has led to high demands on the routers in the core of the network where high performance routing is essential. The current router solutions are often bulky, power-hungry, and expensive. This work targets a single chip solution for a 16 port TCP/IP router for 10 Gbit/s Ethernet networks. The router design is based on a network on chip for internal communications between the functional units. Simulations based on three classes of traffic show a peak performance of about 14-16 Gbit/s per port for the common traffic flow types and about 2.6 Gbit/s per port for minimum size packet traffic without dropping packets. The simulations further show the limiting factors in the design, making it possible to boost performance through redesign.