Inductive contamination analysis (ICA) with SRAM application

Author

Khare, Jitendra ; Maly, Wojciech

Author_Institution

Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA

fYear

1995

fDate

21-25 Oct 1995

Firstpage

552

Lastpage

560

Abstract

This paper proposes a new simulation-based fault modeling methodology. The methodology-an extension of Inductive Fault Analysis-uses the contamination-defect-fault simulator CODEF to directly relate effects of process-induced contamination to circuit-level malfunctions. The application of this methodology (called Inductive Contamination Analysis) is demonstrated by development of SRAM fault models

Keywords

SRAM chips; circuit analysis computing; digital simulation; integrated circuit modelling; integrated circuit testing; CODEF; ICA; SRAM application; circuit-level malfunctions; contamination-defect-fault simulator; fault models; inductive contamination analysis; process-induced contamination; simulation-based fault modeling methodology; Application software; Circuit faults; Circuit simulation; Circuit testing; Computational modeling; Contamination; Independent component analysis; Integrated circuit modeling; Random access memory; Virtual manufacturing;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 1995. Proceedings., International

Conference_Location

Washington, DC

ISSN

1089-3539

Print_ISBN

0-7803-2992-9

Type

conf

DOI

10.1109/TEST.1995.529883

Filename

529883

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2058388