Characterization of MOS interfaces on protected and un-protected 4H-SiC surfaces

In this paper, we present investigations performed on 4H-SiC surfaces annealed at high temperature in the presence of a protective carbon cap and compare these to samples fabricated by the same process, but without a protective layer. The high temperature treatment resulted in sample surfaces with various roughnesses. The annealed samples have been oxidised to fabricate MOS structures in order to investigate the effect of annealing on the physical properties SiO₂/SiC interfaces. Structures have been characterized using C-V measurements. Results suggest that treatments to reduce surface roughness caused by annealing, prior to any oxidation, are effective in reducing the density of interface traps. The density of SiO₂/SiC interface traps for samples treated prior to oxidation is lower than interface trap densities for annealed samples with no preoxidation roughness reduction treatment.