Session 3 overview: Ultra-high-speed wireline transceivers and energy-efficient links: Wireline subcommittee

Smart phones and their social apps drive tremendous growth of Internet and big data infrastructure. In turn, this spurs the insatiable need for data communication bandwidth between chips. In this context, wireline transceivers that push the limits imposed by process technology — in terms of data-rate, energy efficiency, and ability to support bursty traffic — are extremely critical. This session opens with the presentation of 3 complete 28+Gb/s transceivers addressing the challenges of high channel loss (up to 40dB) and multi-standard support. Two papers then address PAM4 signal generation/transmission for future advanced standards at higher data rates. The session concludes with a paper describing a dynamically enabled digital equalizer employed within an ADC-based link, a paper pushing the limits of rapid on/off operation in burst-mode links, and a final paper exploring calibration techniques enabling aggressive transceiver voltage scaling.