Session 8 overview: Low-power digital techniques: Energy-efficient digital

Energy efficiency is becoming the main design driver for both small embedded microcontrollers, as well as multicore platforms. This session presents a wide range of low-power digital-design techniques implemented in complete ultra-low-power microcontrollers for the Internet-of-Things (IoT), as well as in SoC building blocks exploiting fine-grain DVFS. The record-low power operation of the presented ARM and TI cores will prolong battery life in many IoT applications and enable energy-harvesting operations. These papers achieve both low-active power consumption, as well as incorporating techniques for efficient full-state retention. On the SoC side, innovative on-chip voltage and frequency regulation techniques enable operation across a wide range of supply voltages and PVT variations. This enables operation at reduced voltages and lower power. Novel voltage regulators increase energy efficiency and reduce voltage droops on the power rails caused by variations in the current consumptions of the cores.