• DocumentCode
    2062651
  • Title

    Two new techniques for identifying opens on printed circuit boards: analog, junction test, and radio frequency induction test

  • Author

    Wrinn, Joe

  • Author_Institution
    Teradyne Board Test, Walnut Creek, CA, USA
  • fYear
    1996
  • fDate
    20-25 Oct 1996
  • Firstpage
    927
  • Abstract
    This session describes the principles, implementation, strengths, weaknesses and applications of two vectorless test techniques developed by Teradyne, and currently in use on Teradyne board test equipment. The goal of this session is for a practicing test engineer or test manager to understand how these techniques work, how to apply them against different test problems, and how to use them as part of an overall test strategy. Examples drawn from Users´ experience demonstrate how vectorless testing can dramatically reduce test cost and cycle time while maintaining or improving fault coverage
  • Keywords
    economics; electric current measurement; electric resistance measurement; fault diagnosis; fault location; printed circuit testing; PC test; Teradyne; analog test; capacitive coupling; cycle time; fault coverage; junction test; opens; printed circuit boards; radio frequency induction test; test cost; vectorless test; Assembly; Circuit testing; Diodes; Electrical resistance measurement; Fixtures; Force measurement; Pins; Printed circuits; Radio frequency; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 1996. Proceedings., International
  • Conference_Location
    Washington, DC
  • ISSN
    1089-3539
  • Print_ISBN
    0-7803-3541-4
  • Type

    conf

  • DOI
    10.1109/TEST.1996.557157
  • Filename
    557157