Session 15 overview: Data-converter techniques: Data converters subcommittee

The demands for low power and increased bandwidth continue to be a primary motivation for ADCs. However, the system requirements also present demands on the ADC that can drive design choices at the architectural level. This session demonstrates multiple design techniques for realizing high-performance data converters targeted at a variety of applications and process technologies. Papers in this session include high-performance continuous-time delta-sigma ADCs, a PVT-insensitive TDC implemented in 14nm FinFET technology, and new buffering techniques for both reference voltages and input signals. These papers represent multiple advances in capability for low-power, wide-bandwidth, and high-performance data converters.