• DocumentCode
    2066007
  • Title

    FA-STAC: A Framework for Fast and Accurate Static Timing Analysis with Coupling

  • Author

    Das, Debasish ; Shebaita, Ahmed ; Zhou, Hai ; Ismail, Yehea ; Killpack, Kip

  • Author_Institution
    Northwestern Univ., Evanston
  • fYear
    2007
  • fDate
    1-4 Oct. 2007
  • Firstpage
    43
  • Lastpage
    49
  • Abstract
    This paper presents a framework for fast and accurate static timing analysis considering coupling. With technology scaling to smaller dimensions, the impact of coupling induced delay variations can no longer be ignored. Timing analysis considering coupling is iterative, and can have considerably larger run-times than a single pass approach. We propose a novel and accurate coupling delay model, and present techniques to increase the convergence rate of timing analysis when complex coupling models are employed. Experimental results obtained for the ISCAS benchmarks show promising accuracy improvements using our coupling model while an efficient iteration scheme shows significant speedup (up to 62.1%) in comparison to traditional approaches.
  • Keywords
    coupled circuits; delays; integrated circuit design; integrated circuit interconnections; integrated circuit modelling; iterative methods; statistical analysis; FA-STAC; coupling delay model; coupling induced delay variations; fast and accurate static timing analysis with coupling; iterative method; timing analysis convergence rate; Convergence; Coupling circuits; Crosstalk; Geometry; Iterative methods; Parasitic capacitance; Propagation delay; Runtime; Timing; Wires;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design, 2006. ICCD 2006. International Conference on
  • Conference_Location
    San Jose, CA
  • ISSN
    1063-6404
  • Print_ISBN
    978-0-7803-9707-1
  • Electronic_ISBN
    1063-6404
  • Type

    conf

  • DOI
    10.1109/ICCD.2006.4380792
  • Filename
    4380792