DocumentCode
2068920
Title
Co-design of ESD protection and LNA in RFIC
Author
Yueguo Hao ; Qiao Zhang ; Xiaopeng Bai ; Zitao Shi ; Huainan Ma ; Yuhua Cheng
Author_Institution
Shanghai Res. Inst. of Micro Electron. (SHRIME), Peking Univ., Shanghai, China
fYear
2013
fDate
28-31 Oct. 2013
Firstpage
1
Lastpage
4
Abstract
This paper introduces a new FoM (figure of merit) to evaluate the overall performance of ESD and LNA and presents a design procedure of establishing a standard library of ESD protection cells to reduce the design time and complexity for RFIC designer. The electrostatic discharge protection cells have been designed in a 0.35μm BiCMOS process. The ESD robustness and RF characteristics will be verified when the RF chip is done.
Keywords
BiCMOS analogue integrated circuits; electrostatic discharge; integrated circuit design; low noise amplifiers; radiofrequency integrated circuits; BiCMOS process; ESD protection; FoM; LNA; RFIC; electrostatic discharge protection; figure of merit; low noise amplifiers; radiofrequency integrated circuits; size 0.35 mum; Electrostatic discharges; Inductors; Radio frequency; Radiofrequency integrated circuits; Robustness; Standards; Topology;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC (ASICON), 2013 IEEE 10th International Conference on
Conference_Location
Shenzhen
ISSN
2162-7541
Print_ISBN
978-1-4673-6415-7
Type
conf
DOI
10.1109/ASICON.2013.6812038
Filename
6812038
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