Generation of embedded RAMs with built-in test using object-oriented programming

The paper presents the design tool RAMTEX. It manages the automatic insertion of a built-in self-test (BIST) during the design process. Given a high-level description of an embedded RAM, RAMTEX selects the optimal BIST procedure of all procedures existing in its method knowledge base. The selection process is done by the valuation of weighted parameters provided by a human designer. The BIST-RAM is then synthesized by RAMTEX which includes automatically all the necessary expansions for a self test. The result is an EDIF-netlist at the gate level