Electrical design and characterization of Si interposer for system-in-package (SiP)

Author

Kato, Shinobu ; Tango, Tomoyuki ; Hasegawa, Kiyohisa ; Bhandari, Ramesh K. ; Sakai, Atsushi ; Segawa, Hiroshi ; Kariya, Takashi ; Sudo, Toshio

Author_Institution

R&D Oper., Ibiden Co., Ltd., Ogaki

fYear

2009

fDate

26-29 May 2009

Firstpage

1648

Lastpage

1653

Abstract

Si interposer technology has the potential to enable high-bandwidth and low-power image processing devices of the future, because a very high density system with an ultra-fine pitch (les5um) wiring can be fabricated. However, the ultra-fine pitch wiring may adversely affect the electrical performance of devices. This paper discusses the signal propagation properties of ultra-fine coplanar interconnects on Si interposers. A design chart of the interconnects, obtained from the viewpoint of maximum line length versus target operating frequency, is presented.

Keywords

large scale integration; printed circuits; silicon; system-in-package; Si; image processing devices; interposer technology; line length; maximum line length; system-in-package; target operating frequency; ultra-fine coplanar interconnects; ultrafine pitch wiring; Conductivity; Conductors; Delay; Frequency; Image processing; Integrated circuit interconnections; Large scale integration; Power system interconnection; Propagation losses; Wiring;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronic Components and Technology Conference, 2009. ECTC 2009. 59th

Conference_Location

San Diego, CA

ISSN

0569-5503

Print_ISBN

978-1-4244-4475-5

Electronic_ISBN

0569-5503

Type

conf

DOI

10.1109/ECTC.2009.5074236

Filename

5074236