DocumentCode
2073751
Title
Parallelization of the multilevel fast multipole algorithm using the OpenMP and VALU acceleration
Author
Jinbo Liu ; Mang He
Author_Institution
Sch. of Inf. & Electron., Beijing Inst. of Technol., Beijing, China
fYear
2013
fDate
25-28 Aug. 2013
Firstpage
357
Lastpage
360
Abstract
In this paper, a parallelization scheme by the combined use of the OpenMP and Vector Arithmetic Logic Unit (VALU) hardware acceleration is proposed to speed up the multilevel fast multipole algorithm (MLFMA) on the multicore computer architectures. This accelerating technology doesn´t need to add any additional hardware equipment and could be applied to any other multicore computers whose all can obtain good accelerating effect. In addition, the spherical harmonics expansion based MLFMA is applied for reducing the memory costed. Some numerical results of typical objects are shown, through which comparative analyses are performed to give some concluding remarks.
Keywords
graphics processing units; multiprocessing systems; parallel processing; OpenMP hardware acceleration; VALU acceleration; hardware equipment; multicore computer architectures; multicore computers; multilevel fast multipole algorithm; multilevel fast multipole algorithm parallelization scheme; spherical harmonics expansion based MLFMA; vector arithmetic logic unit hardware acceleration; Acceleration; Antennas; Filling; Graphics processing units; Harmonic analysis; MLFMA; Multicore processing; MLFMA; electromagnetic scattering; parallelization; spherical harmonics expansion;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Technology & Computational Electromagnetics (ICMTCE), 2013 IEEE International Conference on
Conference_Location
Qingdao
Type
conf
DOI
10.1109/ICMTCE.2013.6812486
Filename
6812486
Link To Document