DocumentCode
2078024
Title
Carrier Phase Lock Loops Tested with Different Input Waves
Author
Reis, Antonio D. ; Rocha, Jose F. ; Gameiro, Atilio S. ; Carvalho, Jose P.
Author_Institution
Dept. de Electron. e Telecomun., Univ. de Aveiro, Aveiro
fYear
2008
fDate
June 29 2008-July 5 2008
Firstpage
19
Lastpage
22
Abstract
In this work, we will study the carrier phase lock loop (CPLL) when the input carrier changes its shape. The CPLL has four prototypes which are the analog, the hybrid, the combinational and the sequential. The input carrier can be a sinusoidal wave, a triangular wave or a rectangular wave. The objective is to study the four synchronizer types and to observe their jitter behaviors as function of the input carrier SNR (signal- noise ratio), when the carrier changes its shape between the three mentioned waves.
Keywords
phase locked loops; CPLL; carrier phase lock loops; input carrier SNR; rectangular wave; signal- noise ratio; sinusoidal wave; triangular wave; Circuits; Frequency synchronization; Phase locked loops; Sequential analysis; Shape; Signal to noise ratio; Switches; Telecommunications; Testing; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Digital Telecommunications, 2008. ICDT '08. The Third International Conference on
Conference_Location
Bucharest
Print_ISBN
978-0-7695-3188-5
Electronic_ISBN
978-0-7695-3188-5
Type
conf
DOI
10.1109/ICDT.2008.40
Filename
4561278
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