A direct sequence BPSK spread spectrum transceiver chip set

Author

Chien, Charles ; Lau, Linda ; Chen, Gloria ; Chung, Bong Young ; Yang, Paul T. ; Cohen, Etan ; Samueli, Henry ; Jain, Rajeev

Author_Institution

Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA

fYear

1991

fDate

12-15 May 1991

Abstract

The authors describe a design methodology which uses the functional compiler concept to generate the main IF components of a direct sequence binary phase shift keying spread spectrum (DS BPSK SS) transceiver. Three functional compilers are described: a Costas loop generator, a direct digital frequency synthesizer generator, and a Gold sequence pseudorandom number generator. Each compiler automatically generates a digital VLSI implementation for a given set of system specifications. Three 1.2-μm CMOS chips were automatically generated, fabricated, and tested. These chips form a chip set to be used in a prototype DS BPSK SS transceiver operating at a chip rate of 12.7 MHz and an input data rate of 100 kb/s

Keywords

CMOS integrated circuits; VLSI; circuit CAD; phase shift keying; spread spectrum communication; transceivers; 1.2 micron; 100 kbit/s; 12.7 MHz; BPSK; CMOS chips; Costas loop generator; Gold sequence; binary PSK; binary phase shift keying; chip set; design methodology; digital VLSI implementation; direct digital frequency synthesizer generator; direct sequence; functional compiler; pseudorandom number generator; spread spectrum transceiver; Binary phase shift keying; Clocks; Design methodology; Frequency synthesizers; Gold; Laboratories; Spread spectrum communication; Transceivers; Transmitters; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 1991., Proceedings of the IEEE 1991

Conference_Location

San Diego, CA

Print_ISBN

0-7803-0015-7

Type

conf

DOI

10.1109/CICC.1991.164064

Filename

164064