• DocumentCode
    2080921
  • Title

    An algorithm for reducing circuit equations in computer applications

  • Author

    Natarajan, S.

  • Author_Institution
    Dept. of Electr. Eng., Tennessee Technol. Univ., Cookeville, TN, USA
  • fYear
    1989
  • fDate
    26-28 Mar 1989
  • Firstpage
    104
  • Lastpage
    108
  • Abstract
    Computer formulation of circuit equations using the modified nodal analysis is discussed. The modified nodal formulation gives rise to an unproportionately large number of circuit equations, even for small networks. An algorithm is presented to reduce these equations to a very small number, thereby reducing the memory requirement, as well as runtime, for the solution network responses. Though it is useful in any computer-aided analysis of networks, the algorithm is especially useful for microcomputers where memory size and run time are significant. It also eliminates the need to use sparse matrix techniques in solving the circuit equations
  • Keywords
    circuit analysis computing; microcomputer applications; circuit equations; computer-aided analysis; equation reduction; memory size; microcomputers; modified nodal analysis; run time; Admittance; Circuits; Computer applications; Computer networks; Equations; Frequency; Microcomputers; Runtime; Sparse matrices; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    System Theory, 1989. Proceedings., Twenty-First Southeastern Symposium on
  • Conference_Location
    Tallahassee, FL
  • ISSN
    0094-2898
  • Print_ISBN
    0-8186-1933-3
  • Type

    conf

  • DOI
    10.1109/SSST.1989.72442
  • Filename
    72442