DocumentCode
2083644
Title
On-chip calibration of RF detectors by DC stimuli and artificial neural networks
Author
Ramzan, Rashad ; Dabrowski, Jerzy
Author_Institution
Dept. of Electr. Eng., Linkoping Univ., Linkoping
fYear
2008
fDate
June 17 2008-April 17 2008
Firstpage
571
Lastpage
574
Abstract
In the nanometer regime, especially the RF and analog circuits exhibit wide parameter variability, and consequently every chip produced needs to be tested. On-chip design for testability (DfT) features, which are meant to reduce test time and cost also suffer from parameter variability. Therefore, RF calibration of all on-chip test structures is mandatory. In this paper, artificial neural networks (ANN) are employed as multivariate regression technique to architect a general RF calibration scheme using DC- instead of RF stimuli. This relaxes the routing requirements on a chip for GHz test signals along with the reduction in test time and cost. The RF detector, a key element of a radio front-end DfT circuitry, designed in 65 nm CMOS is used to demonstrate the calibration scheme.
Keywords
CMOS integrated circuits; analogue circuits; calibration; circuit analysis computing; design for testability; detector circuits; integrated circuit testing; nanotechnology; neural nets; DC stimuli; RF detectors; analog circuits; artificial neural networks; design for testability; multivariate regression; nanometer; on-chip calibration; Analog circuits; Artificial neural networks; Calibration; Circuit testing; Costs; Design for testability; Detectors; Multivariate regression; Network-on-a-chip; Radio frequency; ANN application; On-chip RF detector; RF BIST; RF DfT; RF calibration; RF testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Radio Frequency Integrated Circuits Symposium, 2008. RFIC 2008. IEEE
Conference_Location
Atlanta, GA
ISSN
1529-2517
Print_ISBN
978-1-4244-1808-4
Electronic_ISBN
1529-2517
Type
conf
DOI
10.1109/RFIC.2008.4561502
Filename
4561502
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