DocumentCode
2084674
Title
Single-chip interpolating time counter with 200-ps resolution and 43-s range
Author
Kalisz, J. ; Szplet, R. ; Pelka, R. ; Poniecki, A.
Author_Institution
Mil. Univ. of Technol., Warsaw, Poland
Volume
1
fYear
1996
fDate
1996
Firstpage
676
Abstract
A new design of the interpolating time counter implemented on a single FPGA chip with amorphous antifuse structures is presented. The counter contains two time-to-digital converters, each having 200 ps resolution (LSB) within 10 ns range, and the 32-bit, 100-MHz real-time counter, which is also utilized for frequency measurement
Keywords
CMOS logic circuits; computer testing; counting circuits; digital signal processing chips; field programmable gate arrays; frequency measurement; integrated circuit testing; interpolation; quantisation (signal); 10 ns; 100 MHz; 43 s; CMOS; FPGA chip; amorphous antifuse structures; frequency measuremen; real-time counter; single-chip interpolating time counter; time-to-digital converters; Amorphous materials; CMOS technology; Calibration; Clocks; Counting circuits; Field programmable gate arrays; Interpolation; Latches; Quantization; Time measurement;
fLanguage
English
Publisher
ieee
Conference_Titel
Instrumentation and Measurement Technology Conference, 1996. IMTC-96. Conference Proceedings. Quality Measurements: The Indispensable Bridge between Theory and Reality., IEEE
Conference_Location
Brussels
Print_ISBN
0-7803-3312-8
Type
conf
DOI
10.1109/IMTC.1996.507468
Filename
507468
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