A novel type of stacked package and assembling method on the SOC

This paper proposes a new 3-D stacked package structure and assembling method, which can be widely used on the system-on-chip (SOC). This present package increases the area of the bottom of the substrate and solders square compact structure for signal transmission around the substrate. Meanwhile, it also removes the solder balls on the bottom of the substrate and coats with the radiating layer. So this package can solve the height and heat issues. This proposed assembling method achieves electrical interconnection between the stacked package and the printed-circuit-board (PCB) by inserting the stacked package into the slot that is designed specially and welded on the PCB. This method makes the stacked package reworked much easier than other relevant assembling methods.