An electrothermal circuit simulation using an equivalent thermal network for electrostatic discharge (ESD)

Author

Kurimoto, K. ; Yamashita, Katsumi ; Miyanaga, I. ; Hori, A. ; Odanaka, S.

Author_Institution

Semicond. Res. Center, Matsushita Electr. Ind. Co. Ltd., Osaka, Japan

fYear

1994

fDate

7-9 June 1994

Firstpage

127

Lastpage

128

Abstract

This paper describes an electrothermal circuit simulation using an equivalent thermal network for electrostatic discharge (ESD). Electrothermal transient characteristics in ESD protection devices are clarified in detail by modeling of complicated snapback behavior and thermal modeling in the multiple layer. The new model allows the simulation for the damage region and failure thresholds of n-MOSFETs under ESD stress conditions.<>

Keywords

CMOS integrated circuits; electrostatic discharge; equivalent circuits; insulated gate field effect transistors; protection; semiconductor device models; simulation; thermal analysis; ESD protection devices; ESD stress conditions; NMOSFET; damage region; electrostatic discharge; electrothermal circuit simulation; electrothermal transient characteristics; equivalent thermal network; failure thresholds; multiple layer; n-MOSFETs; n-channel devices; snapback behavior; thermal modeling; Biological system modeling; Capacitance; Circuit simulation; Diodes; Electrostatic discharge; Electrothermal effects; MOSFET circuits; Protection; Stress; Temperature;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, 1994. Digest of Technical Papers. 1994 Symposium on

Conference_Location

Honolulu, HI, USA

Print_ISBN

0-7803-1921-4

Type

conf

DOI

10.1109/VLSIT.1994.324424

Filename

324424