DocumentCode
2091527
Title
Enabling DFM and APC strategies at the 32 nm technology node
Author
Monahan, Kevin M.
Author_Institution
KLA-Tencor Corp., Milpitas, CA, USA
fYear
2005
fDate
13-15 Sept. 2005
Firstpage
398
Lastpage
401
Abstract
Most semiconductor manufacturers expect 193 nm immersion lithography to remain the dominant patterning technology through the 32 nm technology node. Even now, the interaction of more complex designs with shrinking process windows is severely limiting parametric yield. The industry is responding with strategies based upon design for manufacturability (DFM) and multivariate advanced process control (APC). The primary goal of DFM is to enlarge the process yield window, while the primary goal of APC is to keep the manufacturing process in that yield window. In this work, we discuss new and innovative process metrics, including virtual metrology, that will be needed for yield at the 32 nm technology node.
Keywords
design for manufacture; integrated circuit measurement; integrated circuit yield; lithography; process control; advanced process control; design for manufacturability; immersion lithography; innovative process metrics; manufacturing process; patterning technology; process yield window; shrinking process windows; virtual metrology; Costs; Design for manufacture; Manufacturing processes; Metrology; Numerical analysis; Predictive models; Process control; Semiconductor device manufacture; Shape measurement; Technological innovation;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Manufacturing, 2005. ISSM 2005, IEEE International Symposium on
Print_ISBN
0-7803-9143-8
Type
conf
DOI
10.1109/ISSM.2005.1513388
Filename
1513388
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