• DocumentCode
    2091622
  • Title

    Low parasitic resistance technologies with NES-SAC and SWT-CVD process for low supply voltage, high speed BiCMOS SRAMs

  • Author

    Ishigaki, Y. ; Kuriyama, H. ; Honda, H. ; Kohno, Y. ; Tsuchimoto, J. ; Sakamori, S. ; Kinoshita, A. ; Hirose, T. ; Ohbayashi, S. ; Ashida, M. ; Matsuo, H. ; Miyoshi, H.

  • Author_Institution
    ULSI Lab., Mitsubishi Electr. Corp., Itami, Japan
  • fYear
    1994
  • fDate
    7-9 June 1994
  • Firstpage
    99
  • Lastpage
    100
  • Abstract
    The nitride etch stop self align contact (NES-SAC) process, the single wafer type (SWT-CVD) process and the modified fabrication method of bipolar transistors suitable for low supply voltage, high performance BiCMOS SRAMs are presented. Using these technologies, very small resistance contacts, small resistance ground lines and high performance bipolar transistors with small emitter resistance are achieved. Hence, a 1 M (64k/spl times/18) TTL SRAM with stable cell operation at 1.8 V and high speed access time of 7.8 ns is realized. These technologies are effective for the sub-half micron low supply voltage BICMOS SRAMs.<>
  • Keywords
    BiCMOS integrated circuits; SRAM chips; bipolar transistors; chemical vapour deposition; integrated circuit technology; nitridation; surface treatment; transistor-transistor logic; 1 Mbit; 3 V; 3.4 mum; 5 mum; 7.8 ns; 70 C; NES-SAC; SWT-CVD process; TTL SRAM; bipolar transistors; high performance BiCMOS SRAMs; high performance bipolar transistors; high speed BiCMOS SRAMs; high speed access time; low parasitic resistance technologies; low supply voltage; modified fabrication method; nitride etch stop self align contact process; single wafer type CVD process; small emitter resistance; small resistance ground lines; stable cell operation; sub-half micron low supply voltage BICMOS SRAMs; very small resistance contacts; BiCMOS integrated circuits; Bipolar transistors; Contact resistance; Dry etching; Electrodes; Heat treatment; Immune system; Low voltage; Resistance heating; Temperature;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology, 1994. Digest of Technical Papers. 1994 Symposium on
  • Conference_Location
    Honolulu, HI, USA
  • Print_ISBN
    0-7803-1921-4
  • Type

    conf

  • DOI
    10.1109/VLSIT.1994.324436
  • Filename
    324436