DocumentCode
2091903
Title
Mapping Optimisation for Scalable Multi-core ARchiTecture: The MOSART Approach
Author
Candaele, Bernard ; Aguirre, Sylvain ; Sarlotte, Michel ; Anagnostopoulos, Iraklis ; Xydis, Sotirios ; Bartzas, Alexandros ; Bekiaris, Dimitris ; Soudris, Dimitrios ; Lu, Zhonghai ; Chen, Xiaowen ; Chabloz, Jean-Michel ; Hemani, Ahmed ; Jantsch, Axel ; Va
Author_Institution
THALES Commun., Colombes, France
fYear
2010
fDate
5-7 July 2010
Firstpage
518
Lastpage
523
Abstract
The project will address two main challenges of prevailing architectures: 1) The global interconnect and memory bottleneck due to a single, globally shared memory with high access times and power consumption, 2) The difficulties in programming heterogeneous, multi-core platforms, in particular in dynamically managing data structures in distributed memory. MOSART aims to overcome these through a multi-core architecture with distributed memory organisation, a Network-on-Chip (NoC) communication backbone and configurable processing cores that are scaled, optimised and customised together to achieve diverse energy, performance, cost and size requirements of different classes of applications. MOSART achieves this by: A) Providing platform support for management of abstract data structures including middleware services and a run-time data manager for NoC based communication infrastructure, 2) Developing tool support for parallelizing and mapping application son the multi-core target platform and customizing the processing cores for the application.
Keywords
distributed memory systems; middleware; network-on-chip; MOSART approach; NoC; abstract data structure; distributed memory; mapping optimisation; middleware service; network-on-chip; scalable multicore architecture; Computational modeling; Distributed databases; Load modeling; Memory architecture; Memory management; Wireless communication; ASIP exploration; Network on Chip; Parallelization; System-level exploration; memory services;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI (ISVLSI), 2010 IEEE Computer Society Annual Symposium on
Conference_Location
Lixouri, Kefalonia
Print_ISBN
978-1-4244-7321-2
Type
conf
DOI
10.1109/ISVLSI.2010.71
Filename
5572841
Link To Document