DocumentCode
2092209
Title
Monitoring of yield-critical STI oxide voids and residues in HAR structures
Author
Streller, Uwe ; Mata, Carlos ; Tuckermann, Martin
Author_Institution
Infineon Technol. GmbH, Dresden, Germany
fYear
2005
fDate
13-15 Sept. 2005
Firstpage
479
Lastpage
482
Abstract
Shrinking deep trench DRAM geometries below the 100 nm design rule involves new design concepts in the frontend-of-line, which necessitate new monitoring strategies, such as high aspect ratio (HAR) inspection and reliable detection of stringers and voids. Additionally, known defects such as particles and voids become increasingly critical, as their sizes reach the typical design rule dimension. Infineon Technologies Dresden successfully developed monitoring strategies for residue in HAR structures and STI oxide voids based on a novel high-resolution darkfield inspection concept. These monitoring strategies are closely aligned to the exact process steps and, thus, enable faster response to potential excursions and a shorter learning cycle.
Keywords
DRAM chips; design; inspection; integrated circuit yield; isolation technology; voids (solid); Infineon Technologies Dresden; darkfleld inspection concept; high aspect ratio inspection; monitoring strategies; shallow trench isolation; shrinking deep trench DRAM geometries; yield-critical STI oxide voids; Etching; Geometry; High-resolution imaging; Inspection; Monitoring; Production; Random access memory; Scattering; Surfaces; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Manufacturing, 2005. ISSM 2005, IEEE International Symposium on
Print_ISBN
0-7803-9143-8
Type
conf
DOI
10.1109/ISSM.2005.1513411
Filename
1513411
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