A voltage controlled resistor in CMOS technology using bisection of the voltage range

Author

Tadic, Niksa ; Gobovic, Desa

Author_Institution

Dept. of Electr. Eng., Montenegro Univ., Yugoslavia

Volume

2

fYear

2000

fDate

2000

Firstpage

1137

Abstract

A voltage controlled linear, non-grounded resistor in CMOS technology is presented. It is based on the conversion of the transconductance of the MOSFET in the saturated region to the drain-to-source resistance of the MOSFET in the nonsaturated region. A new approach in the realization of the known linearization technique is applied. Bisection of the input voltage of the controlled resistor is involved by this technique. Simulation results have shown a linearity error less than 0.58% of full scale in the 0 V to 7 V input voltage range

Keywords

CMOS analogue integrated circuits; linearisation techniques; operational amplifiers; resistors; voltage dividers; 0 to 7 V; CMOS technology; MOSFET transconductance; drain-to-source resistance; linear nongrounded resistor; linearity error; linearization technique; nonsaturated region; resistive voltage divider; saturated region; voltage controlled resistor; voltage follower; voltage range bisection; CMOS technology; Educational institutions; Equations; MOSFET circuits; Proportional control; Resistors; Threshold voltage; Video recording; Virtual colonoscopy; Voltage control;

fLanguage

English

Publisher

ieee

Conference_Titel

Instrumentation and Measurement Technology Conference, 2000. IMTC 2000. Proceedings of the 17th IEEE

Conference_Location

Baltimore, MD

ISSN

1091-5281

Print_ISBN

0-7803-5890-2

Type

conf

DOI

10.1109/IMTC.2000.848940

Filename

848940