DocumentCode
2105300
Title
A programmable turbo decoder for multiple 3G wireless standards
Author
Myoung-Cheol Shin ; In-Cheol Park
Author_Institution
KAIST, Daejeon, South Korea
fYear
2003
fDate
13-13 Feb. 2003
Firstpage
154
Abstract
A programmable turbo decoder is designed for multiple 3G wireless standards, which mainly consists of a configurable SISO decoder and a 16 b SIMD processor equipped with 5 processing elements and custom instructions for incremental block interleavers. The decoder occupies 8.90 mm/sup 2/ in 0.25 /spl mu/m CMOS with 5 metal layers, and exhibits a maximum decoding rate of 5.48 Mb/s.
Keywords
3G mobile communication; CMOS digital integrated circuits; decoding; interleaved codes; parallel architectures; pipeline processing; programmable circuits; turbo codes; 0.25 /spl mu/m CMOS; 0.25 micron; 16 b SIMD processor; 16 bit; 5.48 Mbit/s; configurable SISO decoder; custom instructions; incremental block interleavers; maximum decoding rate; multiple 3G wireless standards; programmable turbo decoder; Code standards; Communication standards; Hardware; Interleaved codes; Iterative decoding; Multiaccess communication; Multiplexing; Process control; Standards development; Turbo codes;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. 2003 IEEE International
Conference_Location
San Francisco, CA, USA
ISSN
0193-6530
Print_ISBN
0-7803-7707-9
Type
conf
DOI
10.1109/ISSCC.2003.1234246
Filename
1234246
Link To Document