DocumentCode
2106043
Title
SXGA pinned photodiode CMOS image sensor in 0.35 /spl mu/m technology
Author
Findlater, K. ; Henderson, R. ; Baxter, D. ; Hurwitz, J.E.D. ; Grant, L. ; Cazaux, Y. ; Roy, F. ; Herault, D. ; Marcellier, Y.
Author_Institution
Imaging Div., STMicroelectronics, Edinburgh, UK
fYear
2003
fDate
13-13 Feb. 2003
Firstpage
218
Abstract
A 30 frames/s SXGA 5.6 /spl mu/m pinned photodiode pixel column parallel CMOS image sensor achieves 340 /spl mu/V noise floor and 40 pA/cm/sup 2/ dark current. Performance is limited by pixel 1/f noise, not by the ADC noise floor of 140 /spl mu/V. The column ADC memory employs a custom DRAM to save area. The sensor utilizes a 0.35 /spl mu/m 1P 3M CMOS process.
Keywords
1/f noise; CMOS image sensors; DRAM chips; analogue-digital conversion; integrated circuit noise; 0.35 /spl mu/m 1P 3M CMOS process; 0.35 micron; 340 muV; 5.6 micron; SXGA pinned photodiode CMOS image sensor; column ADC memory; custom DRAM; dark current; noise floor; pinned photodiode pixel column parallel CMOS image sensor; pixel 1/f noise; Bandwidth; CMOS image sensors; CMOS technology; Circuit noise; Colored noise; Low-frequency noise; Photodiodes; Random access memory; Read-write memory; White noise;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. 2003 IEEE International
Conference_Location
San Francisco, CA, USA
ISSN
0193-6530
Print_ISBN
0-7803-7707-9
Type
conf
DOI
10.1109/ISSCC.2003.1234274
Filename
1234274
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