DocumentCode
2106850
Title
A 1.8 V 2 Gb NAND flash memory for mass storage applications
Author
June Lee ; Sung-Soo Lee ; Oh-Suk Kwon ; Kyeong-Han Lee ; Kyong-Hwa Lee ; Dae-Seok Byeon ; In-Young Kim ; Young-Ho Lim ; Byung-Soon Choi ; Jong-Sik Lee ; Wang-Chul Shin ; Jeong-Hyuk Choi ; Kang-Deog Suh
Author_Institution
Samsung Electron., Hwasung, South Korea
fYear
2003
fDate
13-13 Feb. 2003
Firstpage
290
Abstract
A 1.8 V 2 Gb NAND flash memory is fabricated in a 90 nm process resulting in a 141 mm/sup 2/ die and a 0.044 /spl mu/m/sup 2/ effective cell. To achieve the high level of integration, critical layers are patterned with KF photolithography and phase-shift masks with proximity correction.
Keywords
CMOS memory circuits; NAND circuits; flash memories; photolithography; 1.8 V; 2 Gbit; 90 nm; KF; KF photolithography; NAND flash memory; mass storage applications; phase-shift masks; proximity correction; Acceleration; Capacitance; Circuits; Consumer electronics; Costs; Decoding; Digital cameras; Silicon; Videos; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. 2003 IEEE International
Conference_Location
San Francisco, CA, USA
ISSN
0193-6530
Print_ISBN
0-7803-7707-9
Type
conf
DOI
10.1109/ISSCC.2003.1234306
Filename
1234306
Link To Document