The Design of Radix-4 FFT by FPGA

Author

Sun, ZhiJian ; Liu, XueMei ; Ji, Zhongxing

Author_Institution

Coll. of Sci., Qingdao Technol. Univ., Qingdao

fYear

2008

fDate

21-22 Dec. 2008

Firstpage

765

Lastpage

768

Abstract

This paper designs and realizes a synthetic aperture radar (SAR) real-time processor by FPGA chip, Radix-4FFT is the kernel processing in compression algorithm of SAR; The memory organization of Radix-4 FFT is considered. The design of the block floating Radix-4 FFT is valuable in military and civil application, and the complete of transpose is valuable for the later SAR real-time processing research. This paper analyses the performance advantages of using FPGA, and present the processing result of a frame of airborne SAR original data.

Keywords

digital arithmetic; fast Fourier transforms; field programmable gate arrays; synthetic aperture radar; FPGA; Radix-4 FFT; kernel processing; real-time processor; synthetic aperture radar; Algorithm design and analysis; Compression algorithms; Design methodology; Digital signal processing; Digital signal processing chips; Field programmable gate arrays; Hardware; Kernel; Read-write memory; Synthetic aperture radar; DSP; FPGA chip; Radix-4 FFT; Synthetic Aperture Radar (SAR); real-time processor;

fLanguage

English

Publisher

ieee

Conference_Titel

Intelligent Information Technology Application Workshops, 2008. IITAW '08. International Symposium on

Conference_Location

Shanghai

Print_ISBN

978-0-7695-3505-0

Type

conf

DOI

10.1109/IITA.Workshops.2008.32

Filename

4732049