The Design of SAR Signal Processor´s Data Compress System in FPGA

In this paper, combined our real work, we analysis carefully the algorithmic realization of SAR Real-time Signal Processorpsilas Data Compress system in FPGA. This thesis come from the cooperative project between our lab and a Institute of General Staff. The item is star loaded SAR real-time image systems. The real-time signal processor which bases on the FPGA chips is the kernel.The research of this job is just starting in China. This paper introduces the design and realization of car-borne SAR real-time processing system by EP1S25F672C6ALTERA Co. which has an important meaning on the SAR real-time systems, gives a useful approach to processing SAR image in real time. It is sure that this technology will be applied widely in digital signal process really time.