DocumentCode
2111756
Title
One stage 24 GHz LNA with 6.4dB Gain and 2.8 dB NF using 0.18 μm CMOS technology and slow wave transmission lines
Author
Sayag, A. ; Levin, S. ; Regev, D. ; Zfira, D. ; Shapira, S. ; Goren, D. ; Ritter, D.
Author_Institution
Dept. of Electr. Eng., Technion, Haifa
fYear
2008
fDate
13-14 May 2008
Firstpage
1
Lastpage
10
Abstract
In this paper the design methodology of a single stage CMOS low noise amplifier with slow wave transmission lines was described. This design methodology is useful for designing higher gain multi stage amplifiers.
Keywords
CMOS integrated circuits; MMIC amplifiers; low noise amplifiers; network synthesis; CMOS technology; LNA; design methodology; frequency 24 GHz; gain 6.4 dB; higher gain multi stage amplifiers; low noise amplifier; noise figure; size 0.18 mum; slow wave transmission lines; CMOS technology; Current density; Distributed parameter circuits; Gain; Impedance matching; Inductance; Insertion loss; Noise figure; Noise measurement; Transmission lines;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwaves, Communications, Antennas and Electronic Systems, 2008. COMCAS 2008. IEEE International Conference on
Conference_Location
Tel-Aviv
Print_ISBN
978-1-4244-2097-1
Electronic_ISBN
978-1-4244-2098-8
Type
conf
DOI
10.1109/COMCAS.2008.4562814
Filename
4562814
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