Trends in the environmental impacts of CMOS manufacturing

A life cycle inventory model is presented in this study which describes resource demands and chemical emissions for the semiconductor manufacturing process flow of CMOS logic devices. The model is used to analyze several technology generations of chips, from the 1995-era 350 nm node to the 45 nm node, the most advanced CMOS design in current production. Detailed equipment-level data allows an understanding of the relative magnitude of resource demands and impacts by process step or chemical. The analysis illustrates trends in energy use and emissions, including hazardous, volatile organic and global warming gas emissions, over time and thus provides a means to forecast energy and water demands associated with near-future logic device manufacturing.