• DocumentCode
    2113774
  • Title

    Simulation and Analysis for Typical Package Assembly Manufacture

  • Author

    Yong Liu ; Irving, Samuel ; Desbiens, D. ; Timwah Luk

  • Author_Institution
    Fairchild Semicond. Corp., South Portland, ME
  • fYear
    2006
  • fDate
    24-26 April 2006
  • Firstpage
    1
  • Lastpage
    10
  • Abstract
    The manufacturing process for package assembly is a key to assuring the reliability and quality of the semiconductor products. There are a significant number of challenging mechanics problems in assembly manufacturing process that may lead to the failure of die, delamination and package cracking. Identifying potential root causes of quality and reliability problems during the development of an assembly process and during package design is very important; it can reduce scrap during manufacturing, save development time, as well as help insure the product meets the requirements of customers. Simulation can find the root cause quickly and accurately, leading to reduced time and cost. It enables experiments that are too costly to be done by empirical methods. Using simulation we can find the conditions that optimize cost, performance and reliability under different sets of conditions. This paper focuses on modeling and simulation for typical package assembly manufacture processes which have large impact to the product quality and reliability. A finite element framework is developed to simulate the assembly package manufacturing process utilizing the ANSYS software platform. The framework tools are utilized to maximize the robustness of the assembly process in order to eliminate reliability issues, fast run time and minimize costs in development and from manufacturing scrap
  • Keywords
    assembling; electronics packaging; failure analysis; finite element analysis; manufacturing processes; semiconductor process modelling; ANSYS software; assembly manufacturing process; finite element analysis; package assembly manufacture; package design; product quality; product reliability; semiconductor products; Analytical models; Assembly; Costs; Delamination; Lead time reduction; Manufacturing processes; Semiconductor device manufacture; Semiconductor device packaging; Semiconductor device reliability; Virtual manufacturing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Thermal, Mechanical and Multiphysics Simulation and Experiments in Micro-Electronics and Micro-Systems, 2006. EuroSime 2006. 7th International Conference on
  • Conference_Location
    Como
  • Print_ISBN
    1-4244-0275-1
  • Type

    conf

  • DOI
    10.1109/ESIME.2006.1643949
  • Filename
    1643949