DocumentCode
2115004
Title
Dead-time elimination and zero common mode voltage operation of neutral-point-clamped inverter
Author
Gao, Feng ; Yuan, Jianhua ; Li, Ding ; Loh, Poh Chiang ; Gao, Houlei
Author_Institution
Sch. of Electr. Eng., Shandong Univ., Jinan, China
fYear
2011
fDate
May 30 2011-June 3 2011
Firstpage
2880
Lastpage
2885
Abstract
This paper presents the dead-time elimination scheme for modulating neutral-point-clamped inverter. Unlike the dead-time compensation methods reported for mitigating negative effects induced by dead-time insertion, the proposed scheme simply separates each pair of switches by treating every switch independently and triggers the corresponding switches per phase according to the judged current direction. The removal of dead-time interval, together with the introduction of an appropriate modulation scheme, can then help mitigate switching common mode voltage, even without those narrow alternating spikes generated by common dead-time insertion in traditional pulsewidth modulation (PWM) techniques.
Keywords
invertors; pulse width modulation; zero voltage switching; PWM technique; dead-time elimination; neutral-point-clamped inverter; pulsewidth modulation technique; switching zero common mode voltage operation; Insulated gate bipolar transistors; Inverters; Noise; Pulse width modulation; Switches; Turning; Common mode voltage; dead-time; neutral-point-clamped inverter;
fLanguage
English
Publisher
ieee
Conference_Titel
Power Electronics and ECCE Asia (ICPE & ECCE), 2011 IEEE 8th International Conference on
Conference_Location
Jeju
ISSN
2150-6078
Print_ISBN
978-1-61284-958-4
Electronic_ISBN
2150-6078
Type
conf
DOI
10.1109/ICPE.2011.5944786
Filename
5944786
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