DocumentCode
2123367
Title
Phoenix NoC: A distributed fault tolerant architecture
Author
Marcon, Cesar ; Amory, Alexandre ; Webber, Thais ; Volpato, Thomas ; Poehls, Leticia B.
Author_Institution
Pontifical Catholic Univ. of Rio Grande do Sul, Porto Alegre, Brazil
fYear
2013
fDate
6-9 Oct. 2013
Firstpage
7
Lastpage
12
Abstract
The advances in deep submicron technology have made the development of large Multiprocessor Systems-on-Chip (MPSoC) possible and Networks-on-Chip (NoCs) have been recognized to provide an efficient communication architecture for such systems. With the positive effects on the device´s integration some drawbacks arise, such as the increase of fault susceptibility during the MPSoC manufacturing and operation. This work presents Phoenix, which is a direct mesh NoC that implements fault tolerant mechanisms in order to enable end-to-end communication when some links fail. Phoenix implements a distributed fault tolerant mechanism in software (i.e. in each processor) and in hardware (i.e. in each router). Experimental results show that Phoenix is scalable and allows the MPSoC operation even in the presence of several faulty links.
Keywords
computer architecture; fault tolerant computing; multiprocessing systems; network-on-chip; MPSoC manufacturing; MPSoC operation; Phoenix NoC; communication architecture; deep submicron technology; device integration; direct mesh NoC; distributed fault tolerant architecture; distributed fault tolerant mechanism; end-to-end communication; fault susceptibility; faulty links; multiprocessor systems-on-chip; networks-on-chip; Decision support systems; Fault tolerance; MPSoC; NoC;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design (ICCD), 2013 IEEE 31st International Conference on
Conference_Location
Asheville, NC
Type
conf
DOI
10.1109/ICCD.2013.6657018
Filename
6657018
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