• DocumentCode
    2124923
  • Title

    Boundary scan testing combined with power supply current monitoring

  • Author

    Kärkkäinen, Matti ; Tiensyrjä, Kari ; Weissenfelt, Matti

  • Author_Institution
    Electron. Lab., Tech. Res. Centre of Finland, Oulu, Finland
  • fYear
    1994
  • fDate
    28 Feb-3 Mar 1994
  • Firstpage
    232
  • Lastpage
    235
  • Abstract
    The monitoring of power supply current is presented for detecting manufacturing defects in printed circuit boards. Simple and inexpensive test equipment consisting of PC and interface card has been developed to support current monitoring by utilizing IEEE 1149.1 standard test architecture
  • Keywords
    automatic test equipment; boundary scan testing; electric current measurement; fault location; microcomputer applications; peripheral interfaces; printed circuit testing; printed circuits; production testing; DFT rules; IDDq; IEEE 1149.1 standard test architecture; JTAG+ method; PC; boundary scan testing; bridging faults; interface card; manufacturing defects; power supply current monitoring; printed circuit boards; Assembly; CMOS technology; Circuit faults; Circuit testing; Current supplies; Logic testing; Monitoring; Power supplies; Printed circuits; Test equipment;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    European Design and Test Conference, 1994. EDAC, The European Conference on Design Automation. ETC European Test Conference. EUROASIC, The European Event in ASIC Design, Proceedings.
  • Conference_Location
    Paris
  • Print_ISBN
    0-8186-5410-4
  • Type

    conf

  • DOI
    10.1109/EDTC.1994.326872
  • Filename
    326872