Design of a FPGA-Based Parallel Architecture for BLAST Algorithm with Multi-hits Detection

In this paper, a design of a Field Programmable Gate Array (FPGA)-based parallel architecture for Basic Local Alignment Search Tool (BLAST) Algorithm with multi-hits Detection is proposed. Basic Local Alignment Search Tool algorithm is a heuristic biological sequence alignment algorithm and has been widely used in the computational biology domain. The architecture contains several different blocks. Each block will perform a different step of National Center for Biotechnology Information (NCBI) BLAST family algorithms in parallel. The most appealing and distinguishing features of this architecture are the Multiple Hits Finder Array and Hits Combination Block. In the hits detection stage, we apply a Multiple Hits Finder Array approach to realize the multi-hits in one clock cycle. Then the multiple overlapping hits are merged together in the Hits Finder Block to reduce memory consumption and save implementation time. The parallel design makes this FPGA-based BLAST algorithm implementation much faster than an equivalent software program would in a PC. Multiple Hits Finder Array architecture prototype is implemented and the storage expense and synthesis performance of the prototype are discussed.