DocumentCode
2129375
Title
Design of very low pase noise MMIC reproducible X band DRO
Author
Maurin, P ; Laporte, E. ; Branger, B ; Nallatamby, J C ; Reffet, D. ; Prigent, M.
Author_Institution
Thomson-CSF Microelectronique, 29 Av. Carnot, 91349 Massy, Cedex, France.
Volume
2
fYear
1996
fDate
6-13 Sept. 1996
Firstpage
673
Lastpage
676
Abstract
This paper describes the design, building and measurement of a low-phase noise MMIC DRO using a new design method based on the open loop concept and state-of-the-art CAD tools. This DRO, whose setting is very easy, has an oscillation frequency of 10 GHz and an output power of 15 dBm. Its reproducible phase noise of ¿105 dBc/Hz at 10 KHz from the carrier is the best result published for an MMIC FET DRO.
Keywords
Delay; Dielectrics; Frequency synthesizers; Integrated circuit noise; MMICs; Oscillators; Performance gain; Phase noise; Semiconductor device noise; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Conference, 1996. 26th European
Conference_Location
Prague, Czech Republic
Type
conf
DOI
10.1109/EUMA.1996.337670
Filename
4138719
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