Hardware version for two-dimensional cellular automata

Author

Dascalu, Monica ; Franti, Eduard ; Hascsi, Zoltan

Author_Institution

Electron. Dept., Politehnica Univ. of Bucharest, Romania

Volume

2

fYear

1997

fDate

7-11 Oct 1997

Firstpage

597

Abstract

In this paper we propose a hardware version for two-dimensional cellular automata. Since cellular automata are parallel systems containing a large number of simple processing elements, their hardware version is necessary for their real-time study and applications. A cellular automata chip is described both at the architectural and cell level. The paper outlines the main functions of the cellular automata chip and describes how they operate. We also present some quantitative aspects that determine the chip dimension. The chip can be succesfully used for experiments with large CA implying long-time evolution

Keywords

binary sequences; cellular automata; parallel architectures; parallel programming; shift registers; 2D cellular automata; RAM; address multiplexer; architectural level; cell level; cellular automata chip; chip dimension; finite automaton; hardware version; long-time evolution; look-up table; parallel systems; serial shift register; state register; Automata; Clocks; Computational modeling; Concurrent computing; Hardware; High performance computing; Lattices; Mathematical model; Real time systems; Research and development;

fLanguage

English

Publisher

ieee

Conference_Titel

Semiconductor Conference, 1997. CAS '97 Proceedings., 1997 International

Conference_Location

Sinaia

Print_ISBN

0-7803-3804-9

Type

conf

DOI

10.1109/SMICND.1997.651332

Filename

651332